Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices (e.g., NAND, NOR, etc.) have developed into a popular source of non-volatile memory for a wide range of electronic applications. Non-volatile memory is memory that can retain its data values for some extended period without the application of power. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the memory cells, through programming (which is sometimes referred to as writing) of charge-storage structures (e.g., floating gates or charge traps) or other physical phenomena (e.g., phase change or polarization), determine the data value of each memory cell. Common uses for flash memory and other non-volatile memory may include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, mobile telephones, and removable memory modules, and the uses for non-volatile memory continue to expand.
In a NOR flash architecture, a column of memory cells are coupled in parallel with each memory cell coupled to a data line, such as a bit line. A “column” refers to a group of memory cells that are commonly coupled to a local data line, such as a local bit line. It does not require any particular orientation or linear relationship, but instead refers to the logical relationship between memory cell and data line.
Typically, the array of memory cells for NAND flash memory devices is arranged such that the control gate of each memory cell of a row of the array is connected together to form an access line, such as a word line. Columns of the array include strings (often termed NAND strings) of memory cells connected together in series, e.g., source to drain, between a pair of select lines, e.g., a source select line and a drain select line. The source select line includes a source select gate at each intersection between a NAND string and the source select line, and the drain select line includes a drain select gate at each intersection between a NAND string and the drain select line. Each source select gate is connected to a source line, while each drain select gate is connected to a data line, such as column bit line.
Each memory cell can be programmed as a single bit per memory cell (i.e., single-level cell—SLC) or multiple bits per cell (i.e., multilevel cell—MLC). Each memory cell's threshold voltage (Vt) determines the data that is stored in the cell. For example, for a single-level memory cell, a particular program Vt (e.g., a positive Vt) might indicate a first data value, while a particular erase Vt (e.g., a negative Vt) might indicate a second data value. For a single-level programming, each memory cell of a number of memory cells (e.g., an array of memory cells) may be programmed to one of two data states, each indicating a different data value. For example, a first data value may correspond to an erase data state of the memory cell, and a second data value may correspond to a program data state of the memory cell, where the erase data state may be characterized by a distinct range of erase threshold voltages (e.g., that may be negative) and the program data state may be characterized by a distinct range of program threshold voltages (e.g., that may be positive).
Multilevel memory cells take advantage of the analog nature of a traditional flash memory cell by assigning a respective data value (e.g., as represented by a bit pattern) to each of a plurality of data states, e.g., to each of a plurality of distinct ranges of threshold voltages (Vt) that can be stored on the memory cells. Each data state may be characterized by a corresponding distinct range of threshold voltages. A margin (e.g., a certain number of volts), such as a dead space, may separate adjacent data states, e.g., to facilitate differentiating between data values. This technology permits the storage of two or more bits per memory cell, depending on the quantity of data states, and the stability of threshold voltages during the lifetime operation of the memory cells. The number of data states, which are sometimes also referred to as threshold-voltage-distribution windows, used to represent a bit pattern of N bits may be 2N.
With time, from the initial programming of a memory cell, the range of threshold voltages for the program data states of a single-level memory cell or for any of the program data states of a multilevel memory cell may spread out as individual memory cell threshold voltages increase (e.g., due to charge redistribution within the memory cell, etc.) so that the range of threshold voltages for each of the program data states may be wider than when initially programmed. This phenomenon may be referred to as relaxation. For example, when a programming voltage is applied to the control gate of a memory cell, charges may be retained at an interface between a blocking dielectric, located between the control gate and the charge-storage structure, and the charge-storage structure. With time, these charges migrate from the interface into the charge-storage structure, thereby causing the threshold voltage to increase.
For multilevel memory cells, the wider ranges may cause the program data states to be closer together so that the margins between these data states are narrower. This can cause difficulties when trying to differentiate between possible data states of a multilevel memory cell.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternatives for programming memory cells.